ALT Calculated I2C RC rise time versus total bus capacitance, from 20 to 200 pF, for 2.2 kΩ, 4.7 kΩ and 10 kΩ pull-ups. The dashed line marks the 300 ns Fast-mode limit. At 100 pF, 4.7 kΩ gives 398 ns. Formula: tr = 0.8473 Rp Cb. Also check sink-current and VOL limits and measure the actual board waveform. Source: TI SLVA689, February 2015.

ALT Calculated Cortex-M7 DMA RX memory layout, not a measurement. With D-cache enabled in write-back memory, a 16-byte RX buffer sharing a 32-byte cache line with 16 bytes of dirty unrelated data loses that neighbor's cached changes on invalidation. The second layout reserves 16 bytes of padding so RX owns the whole line; other data starts at byte 32. Offsets are bytes from a 32-byte-aligned base. Reserve ceil(16/32) times 32 = 32 bytes. Keep the allocation exclusive during DMA and verify RAM accessibility. Sources: Arm CMSIS-Core and ST CubeH7 DMA_FIFOMode.

ALT Calculated STM32F411 USART2 divider example, assuming PCLK1 is exactly 16 MHz and OVER8=0. Relative to a target of 115,200 baud, BRR 0x008A gives 115,942 baud (+0.644%), 0x008B gives 115,108 baud (-0.080%), and 0x008C gives 114,286 baud (-0.794%). Rates are rounded. This covers divider quantization only; oscillator error and receiver tolerance are separate. Source: ST RM0383 Rev 4, sections 19.3.4-19.3.5. Not measured.

ALT Constructed EEPROM page-write example with 64-byte pages: six bytes starting at address 62 split into a two-byte write at addresses 62 and 63, followed by a four-byte write at 64 through 67. The first chunk is min(6, 64 - (62 % 64)) = 2 bytes. This diagram is not a hardware measurement.