For the debugging article's logging section: archive log_dictionary.json with each Zephyr build sent to devices. The decoder needs the dictionary from that same build; a later rebuild isn't a substitute.
docs.zephyrproject.org/lates…
If I and Q each use 16 bits on USB, 40 MB/s gives 10 MS/s before framing overhead. That alone doesn't guarantee a usable 10 MHz passband. We'd still need Sipeed's packing format, filter response and supported device-side sample rates.
For telemetry logging, keep the receive callback short: LoRaMesher runs it in protocol context. Its queued_receive_example hands payloads to a separate FreeRTOS task, so slow application work can stay out of that callback.
github.com/LoRaMesher/LoRaMe…
Yes. I meant the C library loaded by Python and the MCU build of the same core. A shared input log would let you compare their joint targets before mechanical calibration.
One switch test: compare verilator --version with pkg-config --modversion verilator, then repeat in a directory with a different .verilator-version. The official prefix-install example adds <prefix>/share/pkgconfig to PKG_CONFIG_PATH.
verilator.org/guide/latest/i…
If terminal access is enough, you can start without HDMI. In Raspberry Pi Imager, set up a user, Wi-Fi and SSH for Raspberry Pi OS, then connect from another computer on the same network. Official headless steps:
raspberrypi.com/documentatio…
FreeRTOS xTaskDelayUntil() returns pdFALSE when the sampled tick equals the next target, too. Log the target and actual start tick before treating every pdFALSE as a missed deadline. The host replay below checks the decision logic.
github.com/FreeRTOS/FreeRTOS…
ALT Three examples of FreeRTOS xTaskDelayUntil using a previous target of 1000 ticks and a period of 100 ticks. The next target is 1100. When the function samples tick 1080, it requests a 20-tick block and returns pdTRUE. At tick 1100 it requests no block and returns pdFALSE. At tick 1130 it also requests no block and returns pdFALSE. All three update the stored target to 1100. Assumptions: 32-bit ticks, a positive period and no tick wrap in these examples. These are host-side results from the unchanged function with scheduler hooks stubbed, not MCU timing measurements or a scheduling guarantee. Source: FreeRTOS-Kernel tasks.c, commit ce221a8bb468e462ca6b435cef66a9636e00baf4, checked October 4, 2026.
I'd route the power-via escapes first, then refill zones and check those nets in DRC's Unconnected Items before tuning lengths. Repeat after tuning; KiCad warns that stale zone fills can give incorrect DRC results.
docs.kicad.org/10.0/en/pcbne…
The TME file covers WS2812B-2121-V6: six pads, with DIN on 1 and DOUT on 6. The earlier WS2812B-V6 PDF shows four pads. I'd track revisions by the full part number; V1.0 vs V1.5 alone doesn't show a change to the same device.
Try both builds on the Nano ESP32 with matching scan/logging settings and release optimization. Compare flash and static RAM separately, then peak stack/heap use during a scan. UNO vs S3 also changes hardware and libraries, so it won't isolate language overhead.
For that 30 kHz trace, try the disconnected probe with its ground clip shorted to its tip near the board, then recheck the rail with a ground spring. That helps separate probe-loop pickup from rail noise. Tek's guide:
tek.com/en/documents/whitepa…
MAX6643's fan-fail logic fits: at 100% duty it counts tach pulses for 2 s and can shut off PWM on a fault. Check MAX6643_FANFAIL_B during startup; UG1267 maps it to U97 P03. Datasheet p7:
analog.com/media/en/technica…
A boot/session ID would help too: after an STM32 reset, the counter and timestamp may restart. The CM4 can then start a new timeline instead of interpreting that jump as a huge gap or a wrapped counter.
Worldsemi's linked PDF has V1.5 in the footer despite '1.0' in the filename. Page 2 labels pin 4 as DIN and pin 2 as DOUT. I'd keep that direction in a PCB layout until the supplier confirms otherwise for the shipped part.
I'd keep a sequence number and each servo reply's STM32 receive time in the upstream data. Those timestamps preserve the skew between the three buses when the CM4 receives a batch; one host-arrival timestamp loses that detail.
Solder male headers to the XIAO and sockets to the L76K, then stack them as shown here. Loose headers won't make reliable contacts. Check the 5V/GND orientation before power-up, attach the GNSS antenna, then try the 9600-baud example:
wiki.seeedstudio.com/get_sta…
Reading BOOTSEL on an RP2040 Pico temporarily floats flash CS. The official helper runs in SRAM and masks local IRQs. Other-core or XIP-streamer flash access still conflicts. Check those users before copying the helper.
github.com/raspberrypi/pico-…
In the GPIO sample, a press and release toggle LED0 twice if both edges are sampled. For one toggle per press, debounce the input and toggle only on the transition into the pressed state. The 200 ms poll can also miss a short tap.
I'd replay the same commands and time steps through both builds of the C core, then compare joint targets with an explicit tolerance. That gives you a check for build/math differences before servo calibration enters the picture.